class ZexinLiang:
def __init__(self):
self.name = "Zexin Liang (Rick)"
self.email = "liangzexin96@gmail.com"
self.current = "CS Ph.D. Student @ Fudan University"
self.background = "Microelectronics @ HUST"
self.interests = [
"Design Automation & Machine Learning",
"Digital IC, FPGA & RISC-V",
"Embedded Systems & RTOS",
"PCB Design, Control & Machine Vision",
]- 🔬 Interests: design automation, digital IC, RTL/SoC, RISC-V, FPGA, and hardware acceleration
- 🛠️ Also into: embedded firmware, RTOS, PCB design, power and control, and machine vision
- 🏆 Honors — National First Prize:
- National Undergraduate Electronics Design Contest
- China Undergraduate Engineering Practice and Innovation Competition
- Intel Cup Undergraduate Electronic Design Contest — Embedded System Design Contest
- National Undergraduate Embedded Chip and System Design Contest
- 🤝 Open to: research discussions and collaborations
- Design automation: machine learning methods, optimization, and open-source design flows
- Digital design: RTL, SoC integration, RISC-V cores, and hardware acceleration
- Embedded systems: MCU/RTOS development, control systems, PCB design, and edge computing
- Machine vision: OpenCV, YOLO, and vision-enabled intelligent hardware
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⚙️ EDispense
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🫁 WearableGasDetect
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🏆 NUEDC_Module
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🤖 Logistics-handling-robot
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Digital Design / IC
FPGA / SoC
Embedded / RTOS
Protocols / Hardware
Software / Vision

