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feat(variables): Register mapping DWARF <> x86_64 - #1117
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Co-Authored-By: Dr. Daniel Szokenstein <7881302+szokeasaurusrex@users.noreply.github.com>
Co-Authored-By: Dr. Daniel Szokenstein <7881302+szokeasaurusrex@users.noreply.github.com>
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Rebased onto the x86_64 mapping (#1117), which now introduces the shared Register type and plumbing. Renames Aarch64Register to Arm64Register and drops Register::Unknown. Co-Authored-By: Dr. Daniel Szokenstein <7881302+szokeasaurusrex@users.noreply.github.com>
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To the extent that these suggestions are also applicable to the PR stacked on top of this one, apply them there as well
| /// | ||
| /// [psabi]: https://gitlab.com/x86-psabis/x86-64-ABI | ||
| pub enum Amd64Register { | ||
| Rax = { name: "rax", dwarf: 0 }, |
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Not 100% sure on this, but aren't these registers all prefixed with %?
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| Rax = { name: "rax", dwarf: 0 }, | |
| Rax = { name: "%rax", dwarf: 0 }, |
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I left these without the %. The psABI's DWARF table prints every register through its \reg macro, which adds % because the document uses AT&T assembly syntax throughout. That % is an AT&T sigil rather than part of the register name: Intel syntax writes rax, gimli's X86_64 names have no prefix, and CpuFamily::Amd64.ip_register_name() returns rip. symbolic-cfi uses Breakpad's $rax, which is a separate convention again. No prefix also matches the AArch64 names (x0, sp). If you'd still like the % prefix, I can add it.
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I guess no prefix is most consistent then
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Rebased onto the x86_64 mapping (#1117), which now introduces the shared Register type and plumbing. Renames Aarch64Register to Arm64Register and drops Register::Unknown. Co-Authored-By: Dr. Daniel Szokenstein <7881302+szokeasaurusrex@users.noreply.github.com>
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Rebased onto the x86_64 mapping (#1117), which now introduces the shared Register type and plumbing. Renames Aarch64Register to Arm64Register and drops Register::Unknown.
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Rebased onto the x86_64 mapping (#1117), which now introduces the shared Register type and plumbing. Renames Aarch64Register to Arm64Register and drops Register::Unknown.
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October 30, 2026 12:39
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Implement register mapping from DWARF register numbers to x86_64 registers, represented with a new
Amd64Registerenum. The mapping follows the DWARF register number table of the System V AMD64 psABI.VariableLocation::Registernow holds asymbolic_common::Registerinstead of the raw DWARF number. There is noUnknownregister: register locations on architectures without a mapping are omitted. This PR sits below the AArch64 mapping (#1115) in the stack. Our DWARF test fixtures are all x86_64, so the snapshots now show register names instead of numbers and no locations are lost.Resolves #1116
Resolves SYMBOL-50
via @szokeasaurusrex.
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